1\section{Implementation and compute model}\label{sec:compute}23\subsection{Reference implementation}4The reference implementation is a self-contained PyTorch package (\texttt{prisme/}, about 1,100 lines) with the5backbone, bank, workspace, editor, controller, readout, caches, counterfactual labelling, oracles and the analytic6cost model, plus training, evaluation and baseline packages. In teacher-forced training all $T$ positions of a7batch are processed in parallel: the workspace is a tensor of shape $[B,T,M,w]$, the active queries a tensor8$[B,T,k,w]$ with $k=2$ lanes (the second lane is masked for single-slot actions), and the bank cross-attention of9\eqref{eq:blk1} is one scaled-dot-product call with a per-query causal mask over the $T$ bank rows. Incremental10decoding keeps two caches per request batch---the per-layer Transformer KV cache and the bank $(K,V)$---and is11tested to agree with full-prefix recomputation within $10^{-4}$ under forced budgets, learned routing, early12\Stop{} and mixed edited/unedited positions; the bypass path is bitwise identical to the backbone.1314\subsection{Analytic operation counts}15We count one multiply--add as two operations and ignore normalisations, activations and softmaxes. For a decode16step at context length $T$ the backbone costs $2N_{\mathrm{ne}}+4LTd+2dV$ operations ($N_{\mathrm{ne}}$ the17non-embedding parameters; the vocabulary head is included). One editor block with $k$ active lanes costs18\begin{equation}19F_{\mathrm{block}}(k,T)=\underbrace{4kw^2+4kTw}_{\text{bank read}}+\underbrace{4kw^2+4Mw^2+4kMw}_{\text{slot read}}20+\underbrace{6kwf_w}_{\text{FFN}},21\label{eq:fblock}22\end{equation}23which is exactly the arithmetic model of the original proposal; the slot-key refresh $4Mw^2$ dominates for small24$k$ and is the obvious target for a cached kernel. One controller evaluation costs25$2w^2+4w+6wf_w+|\Act|(2w^2+8w)$ and the readout $2w^2+2(2Mw^2+4Mw)+2wd$. Table~\ref{tab:ops} reproduces the26reference table of the proposal for the 459M configuration at $T=4096$ and reports the implemented model's27accounting; the two agree within 1.3\,\% (the proposal's controller and readout terms were slightly smaller).28The per-action cost proxy used by the controller is $c(a)=\big(L_wF_{\mathrm{block}}(k(a),T)+8k(a)w+\text{one controller29evaluation}\big)/\text{backbone ops}$; at the 103M configuration and $T=512$ it is \SI{0.080}{} for a single and30\SI{0.100}{} for a pair, so eight pair edits cost about $+83\,\%$ of the backbone's operations and dense31sixteen-slot writes about $+310\,\%$.32\input{tables/ops.tex}3334\subsection{Memory}35Parameters at two bytes each: \SI{0.204}{GiB} (103M), \SI{0.852}{GiB} (459M), \SI{2.18}{GiB} (1.18B). Per request36at context $T$: Transformer KV cache $2\cdot L\cdot T\cdot d_{kv}\cdot 2$ bytes (\SI{96}{MiB} at 459M, $T=4096$),37bank $2\cdot T\cdot w\cdot 2$ bytes (\SI{8}{MiB}), one workspace $M\cdot w\cdot 2$ bytes (\SI{16}{KiB}). The bank38grows linearly with the context: \prisme{} v1 is not a constant-memory model, and the bank read in39\eqref{eq:fblock} is linear in $T$ per active lane. Training stores one workspace per position40($B\cdot T\cdot M\cdot w$ floats) per recurrence step; measured peak memory is reported with every run.4142\subsection{Latency protocol}43Latencies are measured for batch-1 and batch-8 greedy decoding with warm-up, device synchronisation after every44token, fp32, a stated prompt length and number of generated tokens, and the cache state recorded45(Section~\ref{sec:results-latency}). Dynamic routing introduces host-side control flow at every action; this46overhead is part of the measurement and is not removed.47