1\section{Threats to validity}2\label{sec:threats}34\paragraph{Construct.} Speedups compare \raid{}'s own CPU backend with its own Metal backend; the CPU backend is a careful but not a vendor-tuned implementation (Accelerate is used for linear algebra, not for the reductions). A hand-vectorised AVX/NEON CPU kernel could narrow the gaps further. Conversely, the GPU kernels are first implementations: the rolling kernel in particular is known to be the wrong algorithm.56\paragraph{Internal.} The laptop was shared with other processes during the runs (load average 2.5--4 on 18 cores); medians with bootstrap intervals and shuffled order mitigate but do not remove this, and the cluster nodes, which were idle, show the same qualitative pattern. Thermal state was recorded (no throttling warnings) but power mode was not controlled. The real panel is one year of one market; the synthetic panels have Student-$t(5)$ returns with no intraday seasonality.78\paragraph{Statistical.} The forecasting results of E2 and E3 use short windows and a fixed-parameter evaluation and are illustrations of equivalence, not model comparisons; no model confidence set or Diebold--Mariano test is reported, and none should be inferred. The provider's point-in-time guarantees apply to fundamentals, which this paper does not use; corporate actions are irrelevant to within-session returns but the close-to-close daily returns of E3 are from unadjusted bars and contain split days as outliers (the QML fits are robust to a handful of such days, but we did not remove them).910\paragraph{External.} All data are US equities from a single vendor; all hardware is Apple Silicon. The conclusions about FP32 accumulation transfer to other FP32-only accelerators in principle, the timing conclusions do not.1112\paragraph{Scope.} Nothing here is a microstructure result: 1-minute bars cannot support noise-robust estimators or order-flow measures, and the registry marks them as not implemented. Energy was not measured.13